Digital Electronics

Competency 13.0 covers the circuits that work in ones and zeros: gates and truth tables, logic families and their voltages, clocks, flip-flops, counters, the bus, displays and microcontrollers, and the probe, pulser and method a technician uses to find a digital fault. This page teaches each of ETA's twelve sub-items once, with section 13 as job practice. Boolean algebra and number systems are in the Mathematics guide; the Digital / Logic tool, the Logic Gates explorer and the Binary Converter do the drilling.

Gates and other logic devices

Competency 13.1 asks you to identify each of the basic digital gates and devices. A logic gate takes inputs that are each high (1) or low (0) and produces one output by a fixed rule. Kuphaldt: a gate is a special amplifier built to accept and produce only those two levels, and the small circle, or bubble, on a symbol always means inversion. A triangle with no bubble is a buffer, which passes the signal through unchanged. The seven gates, with the Boolean notation of section 5 of the Mathematics guide (A' is NOT A):

Kuphaldt: NAND and NOR are universal, because enough of either can be wired to mimic any other gate. TI's SN74LS00 datasheet gives both forms for its four NAND gates: each performs Y = (AB)', which is also A' + B', in positive logic. Two more gate types matter on real boards. A Schmitt trigger input has two thresholds, one for a rising and one for a falling signal, and that hysteresis gives it extra immunity to noise. A tristate output has a third state besides high and low: with its enable input off it floats in a high-impedance (high-Z) state, as if disconnected, which is how several outputs share one bus line (section 7).

Devices built from gates. Kuphaldt's combinational-logic chapter names the common ones: a decoder turns an n-bit code into one of 2ⁿ output lines; an encoder does the reverse; a multiplexer (mux) selects one of several inputs onto one output; a demultiplexer sends one input to one of several outputs; and a half adder adds two bits, its sum being an XOR and its carry an AND. These are combinational: the output depends only on the present inputs, whereas the sequential circuits of sections 5 and 6 also depend on what happened before.

The Logic Gates explorer draws every symbol and runs its truth table, and the Logic Gates lesson in the Study Hub works through the seven gates and why NAND is universal.

Truth tables

Competency 13.2 asks you to construct truth tables for common gates. A truth table lists every possible combination of the inputs and the output each one produces. With n inputs there are 2ⁿ combinations: 4 rows for two inputs, 8 for three and 16 for four. Count the rows in binary, 00, 01, 10, 11, so that no combination is missed. All six two-input gates on one table:

Each inverted gate's column is the exact opposite of its partner's: NAND of AND, NOR of OR, XNOR of XOR. For a gate network, give each intermediate signal its own column and work left to right. For Y = (A + B)C', with three inputs and so 8 rows:

The Digital / Logic tool's Boolean Expression Analyzer builds the truth table for any expression you type.

Logic families and voltage levels

Competency 13.11 asks you to explain voltages and logic families (TTL, CMOS). A family is a way of building gates, and each family defines its own voltage ranges for a valid low and a valid high. Kuphaldt: TTL gates are built from bipolar transistors and CMOS gates from MOSFETs. The manufacturer guarantees two pairs of limits: what an input will accept (V_IL maximum for a low, V_IH minimum for a high) and what an output will deliver (V_OL maximum, V_OH minimum). The values below are from TI's current datasheets for the SN7400, SN74LS00, SN74HC00 and SN74HCT00 quad NAND gates:

• TTL: a 5 V family. Between 0.8 V and 2 V an input is undefined, and Kuphaldt notes no manufacturer guarantees how a gate will read it. This matches the levels in section 2 of the Interfacing guide. Kuphaldt quotes an LS output high of 2.7 V, the figure in older LS datasheets; TI's current SN74LS00 sheet guarantees 2.5 V.
• CMOS: its thresholds are fractions of its supply. The SN74HC00's 3.15 V and 1.35 V at 4.5 V are 70% and 30% of the supply, and Kuphaldt's 5 V CMOS figures, 3.5 V and 1.5 V, are the same fractions. Kuphaldt: CMOS draws far less power than TTL, though its power rises with frequency, its inputs draw almost no current, and it runs on a much wider supply range (about 3 to 15 V for classic CMOS, some to 18 V, against TTL's 4.75 to 5.25 V).
• Speed: every gate takes time to respond. TI gives the SN74LS00 a propagation delay of 9 to 10 ns typical and 15 ns maximum, so three gates in series can take up to 3 × 15 = 45 ns, and the SN74HC00 18 ns maximum at 4.5 V and 25 °C (23 ns over −40 to 85 °C).
• Static: Kuphaldt warns that CMOS inputs are damaged by static electricity; handle CMOS parts with the ESD precautions in the Safety guide.

The gap between what an output guarantees and what an input needs is the noise margin: the most noise that can ride on a weak output before the next gate may misread it. The high margin is V_OH minus V_IH, and the low margin is V_IL minus V_OL.

Digital clocks

Competency 13.10 asks you to describe digital clock usage and circuitry. NEETS: a clock is a timing signal the equipment generates to control its operations; flip-flops, counters and registers act only when the clock is in the right condition, usually on one of its edges. A clock is a square wave or pulse train described by its period T, its frequency f, and its duty cycle (the fraction of each period it is high). The rising edge is the low-to-high transition and the falling edge the high-to-low one.

• Astable multivibrator: NEETS calls this free-running circuit the simplest clock. Its RC values set the frequency, but it lacks the frequency stability some equipment needs; a trigger faster than its free-running rate locks it to the trigger's frequency.
• Monostable (one-shot): one stable state; each trigger produces one output pulse whose width is set by an RC network (NEETS). Kuphaldt: the edge-detecting pulse circuit inside every flip-flop is a one-shot.
• 555 timer: TI's NE555 runs astable or monostable from an external resistor and capacitor; in astable mode the capacitor charges through R_A and R_B and discharges through R_B alone, so the two resistors set both frequency and duty cycle. TI recommends staying at or below 100 kHz.
• Crystal: where the timing must be precise, the clock comes from a quartz crystal; Microchip's PIC16F84A microcontroller, for example, offers crystal and resonator oscillator modes as well as an RC mode, which Microchip says saves cost. Section 3 of the Computer Electronics guide explains why quartz is stable.
• Multiphase clocks: NEETS: complex systems use two or more clock phases so that several operations can finish within one clock cycle.

The 555 Timer calculator works these formulas, and the Scope Lab shows how to read period and duty cycle off a screen.

Flip-flops

Competency 13.4 asks you to explain the purpose of flip-flops and list common types. NEETS: flip-flops are bistable multivibrators, used to store data temporarily, to multiply or divide, to count, and to receive and transfer information. Each has two complementary outputs, Q and Q' (not-Q): when Q is 1, Q' is 0. A flip-flop holds one bit for as long as it has power. NEETS names four types:

The J-K's action on each active clock edge (Q is the output before the edge):

Kuphaldt: the preset and clear inputs are asynchronous, forcing Q to 1 or 0 at once regardless of the clock; a bubble on them means they are active low. On a symbol, a small triangle at the clock input marks an edge-triggered device, and a bubble before it means it acts on the falling edge (NEETS shows the same for the T input).

Counters and registers

Competency 13.3 asks you to explain how electronic counters operate. NEETS: a counter is a series of flip-flops wired to count, used to count operations, quantities or periods of time, to divide frequencies and to address information in storage. The number of different states a counter can show is its modulus: with n flip-flops, 2ⁿ. Each toggling stage halves the frequency it receives, so the last stage's output is the clock divided by the modulus.

• Ripple (asynchronous) counter: each flip-flop is clocked by the output of the one before it, so a change ripples down the chain. Kuphaldt: the propagation delays add, so between counts the outputs briefly show false values (going from 0111 to 1000 the outputs pass through 0110, 0100 and 0000, that is 7, 6, 4, 0 and then 8), and the added delays limit the counter's speed. NEETS: at high clock speeds the ripple can give wrong indications.
• Synchronous counter: the clock goes to every flip-flop at once, and added gates make the stages toggle in the proper sequence (NEETS): in NEETS's three-stage example an AND gate lets the third flip-flop toggle only when the first two are both set. All the outputs change together, with no ripple.
• Decade counter: four flip-flops cut short to 10 states. In NEETS's circuit a NAND gate watches the outputs worth 2 and 8; when the count reaches 1010 (ten), the NAND output goes low and clears every flip-flop, so the counter shows 0000 to 1001, 0 to 9.
• Up, down and ring counters: an up counter counts from 0 and a down counter from its top count toward 0 (NEETS). A ring counter passes a single 1 around a loop of flip-flops, one position per clock pulse.

Registers. NEETS: a register is a temporary storage device for data, addresses and operation codes, named by its number of bits (an eight-stage register is an 8-bit register), and its contents are called a word. A shift register moves its contents one stage per clock pulse; Kuphaldt: an n-stage shift register delays data by n clock times, and the serial-in, parallel-out type (his example is the 74AHC595) takes bits in one at a time and presents them all at once on its outputs. The Digital / Logic tool's Counter / Flip-Flop Frequency Divider computes any stage's output.

The bus

Competency 13.5 asks you to explain the purpose of a digital bus and show how it connects to the sections of a product. A bus is a set of parallel lines shared by every section it connects: the processor, memory and input/output circuits all attach to the same lines, and only the selected section uses them at any moment. Kuphaldt's processor diagram shows the three groups: the address bus selects the location, the data bus carries the data to or from it, and the control bus carries the signals that coordinate who uses the bus and when (read, write, clock and the like). Section 2 of the Computer Electronics guide describes each group.

Only one device may drive a bus line at a time. Kuphaldt's memory example shows how: each memory cell connects to the data bus through tristate buffers, and a decoder enables only the cell whose address is on the address lines, leaving every other cell in its high-impedance state, disconnected. When nothing drives a line it floats; TI warns that a floating CMOS bus raises power consumption and risks damage, and recommends a pull-up or pull-down resistor, usually 1 to 10 kΩ, to hold the line at a defined level.

Displays

Competency 13.6 asks you to list types of display circuitry and describe how numbers and letters are activated digitally. A digital circuit lights a display by driving each of its elements on or off, and a decoder turns a binary code into the pattern of elements that forms a character.

• Seven-segment display: seven LED bars, named a to g in TI's segment identification: a at the top, then b and c down the right side, d at the bottom, e and f up the left side, and g across the middle. Lighting different sets forms the digits 0 to 9.
• BCD-to-seven-segment decoder/driver: takes a 4-bit BCD digit and drives the seven segments. TI's SN74LS47 has active-low, open-collector outputs (each sinks up to 24 mA) designed for common-anode LEDs or incandescent indicators; the SN74LS48 has active-high outputs for common-cathode LEDs. Its lamp-test input turns every segment on, which shows an 8, and its blanking input turns them all off.
• Common anode and common cathode: in a common-anode display all the segment anodes are tied to the positive supply, so a segment lights when its driver pulls its cathode low; in a common-cathode display the cathodes share ground and a segment lights when its driver output goes high.
• Multiplexed digits: Kuphaldt notes that display drivers can run more LED segments than they have pins by multiplexing them.
• Letters: seven segments are made for digits. For letters, Hitachi's HD44780 controller drives a dot-matrix LCD, forming letters, numbers and symbols from 5 × 8 dots out of a built-in character generator, under the control of a 4- or 8-bit processor.

Converters and memory

ETA's competency 13 list does not name these two families of digital devices, and memory is competency 15.4, but every digital product has them. Section 1 of the Interfacing guide and section 4 of the Computer Electronics guide cover them in more depth.

• ADC and DAC: an analog-to-digital converter (ADC) turns a voltage into a binary number and a digital-to-analog converter (DAC) turns a number back into a voltage. Kuphaldt: an ADC's resolution is the number of bits it outputs, which sets how many discrete steps its range is divided into. The flash ADC is the fastest and the most component-hungry; the successive-approximation ADC tries each bit in turn, starting from the most significant.
• Memory: Kuphaldt: memory built from latches is static RAM, fast and volatile (lost without power); dynamic RAM stores each bit as charge on a tiny capacitor, which leaks, so the chip refreshes it periodically. ROM is written once (a PROM by blowing fuses); an EPROM can be erased, by ultraviolet light through a window in a UV-EPROM or electrically in an EEPROM; flash memory stores charge on a MOSFET's insulated gate.

Microcontrollers and simple commands

Competency 13.12 asks you to define microcontrollers and simple programming commands. Kuphaldt: memory, an arithmetic logic unit and a control unit together make a processor; with only minimal memory (its registers) and everything on a single chip, it is a microprocessor, which needs external memory and input/output chips. A microcontroller adds the program memory, data memory and input/output pins on the same chip, so it is a complete small computer. Microchip's PIC16F84A shows the scale: an 8-bit microcontroller with 1024 words of flash program memory, 68 bytes of data RAM, 64 bytes of data EEPROM, 13 I/O pins whose direction is set individually, and 35 instructions. The difference from a microprocessor is in section 6 of the Computer Electronics guide.

A microcontroller program sets its pins as inputs or outputs, then reads and writes them in a loop. The Arduino language reference describes the commands used on its boards:

Programming concepts and languages are competencies 15.6 and 15.7. The Computer Electronics guide's section 9 covers the programming concepts (variables; sequence, selection and iteration; and the edit, compile, load and debug cycle), and section 10 the languages: machine code, assembly, compiled and interpreted languages, and ladder logic for PLCs.

Logic probes and pulsers

Competency 13.8 asks you to describe how logic probes are used to verify states in digital equipment, and competency 13.7 to distinguish how pulsers are used for digital signal tracing. The probe reads; the pulser drives. Section 8 of the Test Equipment guide covers both tools in full, with their precautions.

• Logic probe: powered from the circuit under test and set to its family. Amprobe's LP10B and LP25B read TTL above 2.3 V as high and below 0.8 V as low, and CMOS above 70% and below 30% of the supply; no indicator lit means a bad logic level or an open circuit. HP's 10525T probe stretches a single pulse, too short to see on most oscilloscopes, into a visible blink.
• Logic pulser: HP's 10526T injects a pulse of the proper polarity automatically, a high node pulsed low and a low node pulsed high, in circuit, with no unsoldering, even where an IC output is holding the node. That makes the stimulus-and-response method of analog troubleshooting possible in digital circuits: pulse a point and watch where the pulse stops.

Troubleshooting digital signals

Competency 13.9 asks you to explain how to troubleshoot digital signals. HP's 1972 article on the logic probe and pulser describes the method: first use the probe to look for missing key signals, such as the clock, start, shift, reset or enable lines, which narrows the fault to a small group of ICs; then supply stimulus with the pulser and check each package against its truth table.

1. Confirm power and ground at the IC. Measure from the chip's own supply pin to its ground pin; 74-series TTL needs 4.75 to 5.25 V (TI).
2. Check the clock and control lines. A probe that blinks on the clock pin shows pulses are arriving; check reset and enable are at their working levels (HP).
3. Compare each node with what the logic says. Use the truth table, or the counting sequence for a counter, to predict every output from its inputs, then probe for the node that disagrees.
4. Classify the bad node. Steady high, steady low, a bad level (between the thresholds) or open. An open TTL input floats to about 1.4 V and the probe shows a bad level (HP); a tristate output in its high-impedance state also reads as open.
5. Find the cause with probe and pulser together. A node that stays low while pulsed is shorted to ground, and one that stays high is shorted to the supply (HP). On a long chain, pulse one end and check halfway along, then keep halving (HP).
6. Check timing with a scope. A probe shows states, not edges. TI warns that slow input edges or inputs held near the threshold can make CMOS outputs oscillate, which the oscilloscope reveals.

Signal tracing in general, the half-split method and documenting the repair are in the Work Procedures guide.

On the job: a stuck line on a logic board

Job practice, not exam content. A typical sequence for a dead control line on a digital board. The equipment manual and your employer's procedures come first.

1. Set the probe up for the board. Clip it to the board's own supply and ground and set the TTL or CMOS switch to match the logic family; on the wrong setting it can call a good level bad (section 8 of the Test Equipment guide).
2. Start from the symptom and work back. Probe the stuck output, then the inputs of the gate that drives it. If the inputs are right for the output you expect and the output is wrong, the gate or its output node is the suspect.
3. Put the pulser and probe on the stuck node. If the node still will not move, it is shorted: a steady low is a short to ground, a steady high a short to the supply (HP). The short can be at any input or output tied to that node, not only at the IC driving it.
4. Halve a long path. On a chain of gates or a long trace, pulse at one end and probe the middle, then the middle of the bad half (HP).
5. Replace like with like. An LS part and an HC part do not accept the same input levels (section 3), so match the family letters as well as the number, and handle CMOS replacements with ESD precautions.